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MIPS汇编

PSP的CPU采用MIPS架构，32位。ISA与规范略有变化

  • IDA Pro可以直接解析
  • Ghidra 在插件辅助下可以解析

推荐阅读

  • 《CS:APP》 Chapter 3
  • uOFW Wiki： MIPS, Logical Blocks, Functions 三节
  • Module Tutorial

A Programmer's Perspective

与CS:APP宗旨类似，我们主要观察gcc编译后和objdump出汇编文件的内容。

psp-gcc

psp-gcc是为生成PSP可执行文件而修改过的gcc，位于pspdev/bin文件夹下

不同架构、不同系统上的可执行文件格式不同

使用psp-gcc -v可以显示详细信息

psp@pspserver:~$ psp-gcc -v
Using built-in specs.
COLLECT_GCC=psp-gcc
Target: psp
gcc version 11.2.0 (GCC)

Example

void mult2(int* a,int *b, int *c){
        *c = *a**b;
}

<!-- a in $4 , b in $5, c in $6 -->
mult2:
        .frame  $sp,0,$31               # vars= 0, regs= 0/0, args= 0, gp= 0
        .mask   0x00000000,0
        .fmask  0x00000000,0
        .set    noreorder
        .set    nomacro
        lw      $3,0($4)
        lw      $2,0($5)
        mult    $3,$2
        mflo    $2
        sw      $2,0($6)
        jr      $31
        nop

SW $source register's address, offset($destination register's address) The SW instruction stores data to a specified address on the data memory with a possible offset, from a source register.

LW $destination register's address, offset($source register's address).

MIPS Multiply Unit The multiply unit of MIPS contains two 32-bit registers called hi and lo. These are not general purpose registers. When two 32-bit operands are multiplied, hi and lo hold the 64 bits of the result. Bits 32 through 63 are in hi and bits 0 through 31 are in lo.

High and Low Registers Here are the instructions that do this. The operands are contained in general-purpose registers.

mult s,t # hilo <— $s * $t (two's comp operands) multu s,t # hilo <— $s * $t (unsigned operands)

Arithmetic Instructions

用途 指令 参数 作用 注释
Smaller Than slt $r1, $r2, $r3 r1 = r2 < r3 Signed
slti $r1, $r2, $num
slt: Smaller Than (Signed)

slt $r1, $r2, $r3: r1 = r2 < r3

slti: Smaller Than (Signed) (Immediate)